ISSCC 2019

ISSCC 2019
2019 International Solid-State Circuits Conference
Event in series	ISSCC
Dates	2019/02/17 (iCal) - 2019/02/21
Homepage:	http://isscc.org/2019/
Location
Location:	San Francisco, California, USA
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Important dates
Submissions:	2018/09/10
Committees
General chairs:	Jan van der Spiegel
Table of Contents

Topics

The ISSCC 2019 Conference Theme is “ENVISIONING THE FUTURE”

The relentless progress of solid-state circuits and systems has a profound impact on our daily lives, changing the way we work, communicate, and even socialize. The advancements in Silicon IC technology predicted by Moore’s Law have been fueling this progress, but pursuing this trend further becomes increasingly more challenging from technology and economic perspectives. Stimulated by these difficulties, the solid-state circuit community is exploring a multiplicity of paths for further development: from novel technologies (innovative devices and integration techniques, such as qubits, spintronics, 3D, and photonic integration), to original approaches (such as Artificial Intelligence (AI) and Machine Learning (ML)), to new applications (such as wearable electronics, IoT, virtual reality, autonomous driving, robotics, and many more). It is difficult to clearly envision the way forward in this vibrant but complex emerging world: Thus, ISSCC 2019 is seeking innovations that will inspire the future of solid-state circuits and systems.

Innovative and original papers are solicited in subject areas including (but not limited to) the following:

ANALOG: Amplifiers, comparators, oscillators, filters, references; nonlinear analog circuits; digitally-assisted analog circuits; MEMS/sensor interface circuits.

DATA CONVERTERS: Nyquist-rate and oversampling A/D and D/A converters; embedded and application-specific A/D and D/A converters; analog to information conversion; time-to-digital converters.

DIGITAL ARCHITECTURES & SYSTEMS: Microprocessors, micro-controllers, applications processors, graphics processors; digital systems for communications, video and multimedia, machine-learning, deep-learning, neuromorphism, cryptographics, security and trusted computing, special-function acceleration, processing-in-memory; reconfigurable systems, near- and sub-threshold systems, digital architectures and systems for emerging applications (e.g. virtual reality – AR/VR and autonomous vehicles).

DIGITAL CIRCUITS: Building blocks for 2D/3D SoC such as intra-chip communication circuits, clock distribution techniques, soft-error and variation-tolerant circuits. Circuits for power management in digital applications: including voltage regulators, adaptive digital circuits, digital sensors; Near- and sub-threshold circuits; PLLs for digital clocking applications. Circuits for neuro-computing; Hardware security circuits including PUFs, TRNG, and attack-detection sensors.

IMAGERS, MEMS, MEDICAL, & DISPLAYS: Image sensors and SoCs; automotive, LIDAR, and ultrasonic sensors; MEMS sensor systems; wearable, implantable, ingestible electronics, biomedical SoCs, neural interfaces and closed-loop systems; biosensors, microarrays, and lab-on-a-chip; display electronics, displays with sensing functionality; sensing for AR/VR.

MEMORY: Static, dynamic, and non-volatile memories for stand-alone and embedded applications; memory/SSD controllers; high-bandwidth I/O interfaces; memories based on phase-change, magnetic, spin-transfer-torque, ferroelectric, and resistive materials; array architectures and circuits to improve low-voltage operation, power reduction, reliability, and fault tolerance; memory-subsystem enhancements, including in-memory logic functions, machine learning, artificial intelligence, and AR/VR.

POWER MANAGEMENT: Power control and management circuits, regulators; switched-mode power converter ICs using inductive, capacitive, and hybrid techniques; energy-harvesting circuits and systems; wide-bandgap topologies and gate-drivers; power and signal isolators; circuits for lighting, wireless power.

RF CIRCUITS and WIRELESS SYSTEMS*: Building blocks and complete solutions at RF, mm-Wave and THz frequencies for receivers, transmitters, frequency synthesizers, transceivers, SoCs, and SiPs. Innovative circuit-level and system-architecture solutions for established wireless standards and future systems or applications such as radar, sensing, and imaging.

TECHNOLOGY DIRECTIONS: Emerging IC and system solutions for: biomedical, sensor interfaces, analog signal processing, power management, computation, data storage, and communication; analog/mixed-signal techniques for security and machine learning; non-silicon-, carbon-, organic-, metal-oxide-, compound-semiconductor- and new-device-based circuits; nano, flexible, large-area, stretchable, printable, quantum, optical, and 3D-integrated electronics; spintronics.

WIRELINE: Receivers/transmitters/transceivers for wireline systems, including backplane transceivers, optical links, chip-to-chip communications, 2.5/3D interconnect, copper-cable links, and equalizing on-chip links; exploratory I/O circuits for advancing data rates, power efficiency, and equalization; wireline transceiver building blocks (such as AGCs, front ends, equalizers, clock-generation and distribution circuits including PLLs, clock-and-data recovery, line drivers, and hybrids).

• Papers submitted to this category will be reviewed by either the RF or Wireless Subcommittees.

Firm Deadline for Electronic Submission of Papers: September 10, 2018 3:00 PM Eastern Daylight Time (19:00 GMT)