ISSCC 2018

ISSCC 2018
2018 International Solid-State Circuits Conference
Event in series	ISSCC
Dates	2018/02/11 (iCal) - 2018/02/15
Homepage:	http://isscc.org/2018/
Location
Location:	San Francisco, California, USA
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Important dates
Submissions:	2017/09/11
Committees
General chairs:	Anantha Chandrakasan
Table of Contents

Topics of Interest

The ISSCC 2018 Conference Theme is “Silicon Engineering a Social World”

Continued advances in solid-state circuits and systems have brought evermore powerful communication and computation capabilities into mobile form factors. These ubiquitous smart devices lie at the heart of a revolution shaping how we connect, collaborate, build relationships, and share information. Such social technology allows people to maintain connections and support networks that otherwise would not be possible; it provides the ability to access information instantaneously and from any location, helping to shape the world’s events and culture. Thereby, citizens of all nations are more empowered than ever before, and social networks allow worldwide communities to develop and bond through common interests. ISSCC 2018 is seeking innovations that will bring further progress in developing a truly-connected social world.

Innovative and original papers are solicited in subject areas including (but not limited to) the following:

ANALOG: Amplifiers, comparators, oscillators, filters, references; nonlinear analog circuits; digitally-assisted analog circuits; sensor interface circuits.

DATA CONVERTERS: Nyquist-rate and oversampling A/D and D/A converters.

DIGITAL ARCHITECTURES & SYSTEMS: Microprocessors, micro-controllers, applications processors, graphics processors; systems for communications, video and multimedia, machine-learning, deep-learning, neuromorphism, cryptographics, special function acceleration, processing-in-memory, FPGA/reconfigurable systems, system-level power management, nearthreshold/subthreshold systems, digital architectures and systems for emerging applications (e.g. virtual reality, autonomous vehicles).

DIGITAL CIRCUITS: Building blocks for 2D/3D SoC, including: special-purpose digital circuits, intra-chip communication circuits, clock-distribution techniques, soft-error and variation-tolerant circuits; Circuits for power management in digital applications, including, digital/synthesizable voltage regulators and PLLs, digital sensors, adaptive circuits; Subthreshold and Near-threshold circuits; Circuits for neuro-computing; Hardware-security circuits including PUFs, TRNGs, crypto-circuits, side-channel-attacks mitigation.

IMAGERS, MEMS, MEDICAL, & DISPLAYS: Image sensors and companion chips; image-sensor SoCs; MEMS-based integrated systems; ultrasonic sensors, neural interfaces and closed-loop systems; biosensors, microarrays, and lab-on-a-chip; wearable electronics; biomedical SoCs; display and touch electronics, flexible displays, and displays with integrated sensing functionality.

MEMORY: Static, dynamic, and non-volatile memories for stand-alone and embedded applications; memory/SSD controllers; high-bandwidth I/O interfaces; memories based on phase-change, magnetic, spin-transfer-torque, ferroelectric, and resistive materials; array architectures and circuits to improve low-voltage operation, power reduction, bit-error management, reliability, and fault tolerance; memory-subsystem enhancements, including in-memory logic functions.

POWER MANAGEMENT: Power control and management circuits, regulators; switched-mode power supplies, using inductive, capacitive, and hybrid techniques; energy harvesting circuits and systems; circuits for lighting.

RF CIRCUITS and WIRELESS SYSTEMS*: Building blocks and complete solutions at RF, mm-Wave and THz frequencies for receivers, transmitters, frequency synthesizers, transceivers, SoCs and SiPs; Innovative circuit-level and system architecture solutions for established wireless standards and future systems or applications, including wireless sensing, radar and localization.

TECHNOLOGY DIRECTIONS: Emerging IC and system solutions for: biomedical applications, sensor interfaces, analog signal processing, power management, computation, data storage, security, and communication; non-silicon, carbon, organic, metaloxide-, compound, wide-bandgap-semiconductor. and nano electronics circuits; flexible, large-area, stretchable, and printable electronics; 3D integration; spintronics; quantum, optical, new-device, and non-transistor-based circuits.

WIRELINE: Receivers/transmitters/transceivers for wireline systems, including backplane transceivers, optical links, chip-to-chip communications, 2.5/3D interconnect, copper cable links, and equalizing on-chip links; exploratory I/O circuits for advancing data rates, power efficiency, and equalization; building blocks for wireline transceivers (such as AGCs, analog and ADC/DAC-based front ends, equalizers, clock generation and distribution circuits including PLLs, line drivers, and hybrids).

Papers submitted to this category will be reviewed by either the RF or Wireless Subcommittees. Firm Deadline for Registering Intent to Submit: Thursday, September 7, 2017 • 3:00 PM Eastern Daylight Time (19:00 GMT) Firm Deadline for Electronic Submission of Papers: Monday, September 11, 2017 • 3:00PM Eastern Daylight Time (19:00 GMT)